Spacekiwi wrote:I heard one guy use a restuaraunt as as an example of why pcs dont need a fsb anymore. he called the L1 cache a table you sat at, the L2 cache a serving trolley, and the L3 cache the maib buffet table in the middle of the room. the fsb was rollerskates with jets. he said it used to be you had food on your table, or he would skate to the kitchen and make you an order. that would take a minute, as opposed to half a second for having it on the table to start with. with the introduction of the L2, if it wasnt on the table, and it was on the trolley, slightly longer than from the L1, but quicker then going to the kitchen. L3, slower than L2, but quicker than kitchen. So it used to be 100% went through FSB at slow speeds. now, >80% goes through L1, >80% of remainder goes through L2, >80% of remainder goes through L3. result? going to the kitchen not required except in <1% of cases. so nowdays, improving the speed of the rockets does bubkus.....
Lol... Completely incorrect and totally confusing, but definitely funny description!
First of all, L1/L2/L3 are cache memory structures. If you go back to the -90s, then generally cpu´s had L1 and the motherboards had L2 and much less often L3.
Nowadays, most cpu´s have onchip cache from L1 to L3.
What cache memory DO, is to select data and instructions that are most used and store them, trying to keep delays for fetching stuff as low as possible.
The smaller the cache, the faster you can make it, so L1 tends to be tiny but have superfast transfer and reaction times while L3 tends to be large and relatively slow.
Now, what is/was FSB?
Oldstyle, the motherboard chipset consists of a northbridge and a southbridge.
Cpu connects to the northbridge, which is also what RAM and graphics(since AGP) connects to.
Southbridge connects network, PCI and ISA buses for addin cards, and it handles slow storage interfaces, IDE/PATA/SATA as well as USB, serial, paralell ports, keyboard and similar connections.
The FSB, is the
link that connects the cpu to the northbridge.
So, EVERYTHING the cpu does, every piece of data that comes or goes to or from the cpu, regardless to or from where, goes through the FSB.
Now, a modern cpu changes things a lot.
Most importantly, it moves the RAM controller and connection onto the cpu itself. And this is THE main part of what the FSB needed lots of speed and bandwidth for.
And then, AMD switched to their Hypertransport in 2003 and Intel to their Quickpath Interconnect in 2008.
So, fastest Intel FSB ever used, managed 12.8GB/s(mostly theoretically and used in overclocked systems, like the one i´m typing this on). That was unidirectional and exclusive transfer, ie. the bus could only transfer a single packet of data at any one time and only in one direction. A severe drawback.
Fastest AMD used, was 3.2GB/s but was nonexclusive and bidirectional, so even though it sounds much slower, in reality AMDs fastest EV6 bus in 2003 was probably roughly equal to the fastest Intel had in 2008(better for some use, worse for some).
When AMD switched, their Hypertransport started out at 3.2GB/s. For a link that no longer needed to handle any transfers from the RAM. Today it runs at 12.8 up to 51.2GB/s.
Intel´s current QPI is roughly comparable(also in not being unidirectional and exclusive any longer(finally!)).
So in the end, the single most demanding transfer requirement of the FSB was removed, while what replaced the FSB has still been greatly speeded up.
Sure, gfx cards have speeded up and SATA and all, but it´s nothing even close to reaching the kind of bandwidth needed by the RAM memeory.
Hence, raising the speeds of the HT or QPI today becomes more or less irrelevant, as most things connecting through that link doesn´t need that much speed, nor does it have limitation issues that can be alleviated with greater speed ( like the old Intel FSB ).
So, need or not for FSB has nothing at all to do with any of the L1/L2/L3 caches. It has simply been replaced by a more dedicated link, while the RAM interface has been given it´s own separate link.
Talking about the cache structure is merely confusing and irrelevant.